ANAHEIM, Calif.--(BUSINESS WIRE)--Design Automation Conference 2010 -- Altos Design Automation, Inc. today announced that the company is expanding its corporate structure and organization to fulfill ...

San Jose, California — June 28, 2007 – Altos Design Automation Inc. today announced that TSMC Reference Flow 8.0 includes Altos’ statistical timing model generator Varietytm. Reference Flow 8.0 ...

Altos Design Automation Inc., a San Jose, Calif.-based EDA startup, has raised $1.5 million in Series A funding led by Vista Ventures. http://www.altos-da.com/ ...

PARIS — Library characterization startup Altos Design Automation Inc. announced it has doubled headquarters space in Campbell, Calif., added John Ennis as worldwide vice president of sales and ...

Leuven, Belgium and San Jose, California: Belgian electronics research centre Imec and Altos Design Automation have agreed to establish a library re-characterization service based on Altos ...

The Japanese Semiconductor Technology Academic Research Center (STARC) has adopted Altos Design Automation’s cell characterization technology as the basis for its statistical static-timing analysis ...

In a move to extend its silicon realisation offering for advanced node SoC design enablement, Cadence Design Systems has acquired EDA company Altos Design Automation. The firm's design tools enable ...

The Silicon Integration Initiative’s Open Modeling Coalition has finalized the Si2 Effective Current Source Modeling (ECSM) Statistical Extensions specification draft. The new specification will be ...

Altos Design Automation, Inc. was a provider of characterization technology for the creation of library views for timing, signal integrity, power analysis and optimization applications. Their tool ...