New Electronics

Rambus launches HBM4E controller IP for next‑generation AI memory performance

Rambus has introduced a new HBM4E Memory Controller IP, marking what the company describes as a major step forward in meeting ...
Semiconductor Engineering

How Memory Design Optimizes System Performance

Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on ...
Business Wire

Rambus Announces Industry-First HBM4 Controller IP to Accelerate Next-Generation AI Workloads

SAN JOSE, Calif.--(BUSINESS WIRE)--Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced the industry’s first HBM4 Memory Controller IP, ...
Semiconductor Engineering

DRAM Simulator For Evaluation of Memory System Design Changes (ETH Zurich)

A technical paper titled “Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator” was published by researchers at ETH Zurich. “We present Ramulator 2.0, a highly modular and extensible DRAM ...
Electronic Design

A Summary Of The DDR Memory Controller Standard—Wait, There Isn’t One!

The number of systems-on-a-chip (SoCs) that require an interface to off-chip memory is increasing. As a result, more and more designers are turning to double-data-rate (DDR) SDRAM interfaces such as ...
Design And Reuse

Rambus Sets New Benchmark for AI Memory Performance with Industry-Leading HBM4E Controller IP

Built on a proven track record of over one hundred HBM design wins to ensure first-time silicon success Delivers up to 16 Gigabits per second per pin at low latency to meet the demands of ...
Electronic Design

DDR FCRAM Boosts Performance In DDR SDRAM Designs

A modified form of synchronous DRAM technology, double-data-rate, fast-cycle random access memory (DDR FCRAM) is primarily focused at the networking market segment. Yet due to its high performance, it ...