Semiconductor Engineering

Speeding Up NMOS

For years—decades, in fact—the NMOS transistor world has been on cruise control. NMOS is naturally faster and its performance has scaled better than PMOS. PMOS has had a cost advantage. But lately, it ...
Electronic Design

Use Hybrid PMOS-NMOS Active Loads To Cut Substrate Noise In Differential Amplifiers

PMOS transistors are less vulnerable to substrate noise since they’re placed in separate wells; designers implement guard rings to attenuate the substrate noise propagation. However, substrate noise ...
Electronics Weekly

X-Fab adds 375V nmos and pmos super-junction transistors to BCD chip process

X-Fab Silicon Foundries has added 375V power transistors to the devices available from its 180nm deep trench isolation BCD-on-SoI platform chip fab. The second generation of its XT018 super-junction ...
Semiconductor Engineering

Reliability After Planar Silicon

Negative bias temperature instability (NBTI) poses a very serious reliability challenge for highly scaled planar silicon transistors, as previously discussed. However, the conventional planar silicon ...
EDN

Eliminate crossover distortion in rail-to-rail amplifier design

All operational amplifier (op-amp) datasheets have an input voltage range limitation called the common-mode range. Strictly speaking, the common-mode voltage is the average voltage on the two inputs ...
Electronic Design

Say Farewell to Offset Voltage with a Zero-Drift Op Amp

As analog engineers, it’s tempting to fantasize about one day coming close to designing the ideal operational amplifier we encountered in college: infinite bandwidth, zero output resistance, and so on ...