Hackaday

test pattern

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
EDN

Finding fault with traditional test pattern types

It is well established that transition and stuck-at fault models detect the vast majority of production defects. The transition fault model focuses on detecting timing-related defects. However, the ...
Hackaday

Test Pattern Generator For SCART And RGB TVs

CRTs don’t last forever, and neither do the electronics that drive them. When you have a screen starting to go wonky, then you need a way to troubleshoot which is at fault. A great tool for that is a ...
Semiconductor Engineering

Reducing Chip Test Costs With AI-Based Pattern Optimization

The old adage “time is money” is highly applicable to the production testing of semiconductor devices. Every second that a wafer or chip is under test means that the next part cannot yet be tested.
Electronic Design

What’s The Difference Between Scan ATPG And IJTAG Pattern Retargeting?

Both scan automated test pattern generation (ATPG) patterns and IJTAG patterns 1,2,3 are created for a piece of logic that is part of a much larger design. For both, the patterns are independent from ...
Audioholics

ISF Gives Away 4K Test Patterns to Calibrators

Once unzipped, each pattern is around 24MB. If you're already a member her is a direct link to the 4K ISF Test patterns. The Imaging Science Foundation (ISF) has released some free 4K test patterns ...
Electronic Design

Using Timing Constraints For Generating At-Speed Test Patterns

Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...