Design-Reuse

Xilinx Pcie specification IP Listing

Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root port, switch, bridge and advanced features ...
EDN

Programmable x8 PCIe IP core makes PCI-SIG Integrators List

San Jose, Calif.— Xilinx, Inc. announced immediate availability of its compliant x1, x4 and x8 lane LogiCORE PCI Express IP Core targeted for telecom, networking, storage and video applications. The ...
Yahoo Finance

IntelliProp SATA 6Gb/s Host Core Certified on Xilinx Kintex-7(R) FPGA

LONGMONT, CO--(Marketwired - June 03, 2014) - IntelliProp Inc announced today that their SATA 6Gb/s Host Intellectual Property (IP) Core has passed certification by the University of New Hampshire ...
Commercial Integrator

Audinate Releases Dante IP Core for Xilinx FPGAs

Audinate recently announced the availability of Dante IP Core, a soft IP solution for audio manufacturers. Dante IP Core “allows OEMs working with field programmable gate array [FPGA]-based designs to ...
Design-Reuse

Xilinx pcie pmda IP Listing

Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controller is compliant with the PCI Express 5.0 ... Rambus ...