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28:09
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Expanding a RISC-V Processor with Vector Instructions for Accelerating Machine Learning
Presented by Pete Alexander, John Holden, Harry Cooper, Byron Theobald, Aaryaman Bhattacharya, Matthew Johns, University of Southampton The open-source RISC-V instruction set architecture is gaining interest throughout industry and academia. One advantage of RISC-V is the ability to add custom instruction extensions to the processor targeting ...
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